Package technology evaluation and optimization for high-speed applications

Abstract

This paper analyzes the electrical performance of standard and coreless packages up-to 100Gbps data rate. The impact of package design attributes e.g. substrate core thickness, plated through hole (PTH) pad dimension and geometry of second level interconnect (SLI) on insertion loss performance are explored in this study. This study also evaluates the electrical performance of an alternative coreless package solution with metal grid array (MGA) SLI to enable ultra-thin and small form factor electronic devices. In addition to the advantages of configurable and scalable SLI geometry, the full-wave electromagnetic simulation results shows significant insertion loss performance improvement with MGA coreless package as the frequency increases. The root-causes of insertion loss degradations among the evaluated packaging solutions were identified and further discussed in this paper.