VLSI architecture of Rayleigh fading simulator based on IIR filter and polyphase interpolator

F. Sattar, M. Mufti
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引用次数: 1

Abstract

This paper presents hardware design of a Rayleigh fading simulator that efficiently generates Gaussian variates with Jakes power spectral density. The architecture is based on Komninakis design consisting of a fixed IIR filter followed by a polyphase interpolator for different Doppler rates. The hardware simulator facilitates real time error performance evaluation of wireless channels in Rayleigh fading environments. It also offers the potential of improving the evaluation speed by orders of magnitude over a software based simulation.
基于IIR滤波器和多相插值器的瑞利衰落模拟器的VLSI结构
本文介绍了一种瑞利衰落模拟器的硬件设计,该模拟器能有效地生成具有杰克斯功率谱密度的高斯变量。该架构基于Komninakis设计,由固定IIR滤波器和不同多普勒速率的多相插值器组成。该硬件模拟器便于对瑞利衰落环境下无线信道的实时误差性能进行评估。与基于软件的模拟相比,它还提供了将评估速度提高几个数量级的潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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