Work-in-Progress: Triple Event Upset Tolerant Area-Efficient FPGA-Based System for Space Applications And Nuclear Plants

Abstract

This paper focuses on FPGA-based systems in the context of space applications and nuclear plants which are extremely harsh environments. In such environments, the probability of occurrence of Multiple Event Upsets (MEUs) is not negligible. Conventional fault-tolerant architectures (such as Triple Modular Redundancy) will NOT be able to handle Triple Event Upsets (TEUs) for example. A fault-tolerant architecture with only six identical modules is developed in this paper even though, intuitively, at least seven modules are required for a system to recover from a TEU. It is proven that the proposed architecture can fully recover from any sequence of Single, Double or Triple Event Upsets by using Dynamic Partial Reconfiguration. If a hard fault affects one of the modules, the architecture will lose some of its fault tolerance but may be able to continue operating correctly depending on the nature of the next fault.