A Communication-Efficient Multi-Chip Design for Range-Limited Molecular Dynamics

Chunshu Wu, Tong Geng, Chen Yang, Vipin Sachdeva, W. Sherman, Martin C. Herbordt
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引用次数: 4

Abstract

Molecular Dynamics simulation (MD) has been thought a promising FPGA application for many years, especially with clusters of tightly coupled FPGAs where the large-scale, general-purpose, low-latency interconnects provide a communication capability not available with any other COTS computing technology. Parallelization of one part of the MD computation, the 3D FFT, has been studied previously; for likely FPGA cluster sizes, however, the range-limited computation (RL) is more challenging. The motivation here is that the direct replication of the single-chip design suffers from inefficient inter-board bandwidth usage. In particular, although communication in RL is local, likely bandwidth limitations will constrain performance unless great care is taken in design and analysis. In the multi-chip scenario, inter-board bandwidth is the critical constraint and the main target of this work. We analyze it with respect to three application restructurings: workload distribution, data forwarding pattern, and data locality. We describe how bandwidth can be balanced by configuring workload distribution and data forwarding paths with respect to the number of onboard transceiver ports. We also show that, by manipulating data locality, the multi-chip design is efficiently migrated from the single-chip design, and the total bandwidth required can be configured to satisfy the bandwidth limit. In the multi-chip scenario, inter-board bandwidth is the critical constraint and the main target of this work. We analyze it with respect to three application restructurings: workload distribution, data forwarding pattern, and data locality. We describe how bandwidth can be balanced by configuring workload distribution and data forwarding paths with respect to the number of onboard transceiver ports. We also show that, by manipulating data locality, the multi-chip design is efficiently migrated from the single-chip design, and the total bandwidth required can be configured to satisfy the bandwidth limit.
限程分子动力学的高效通信多芯片设计
分子动力学模拟(MD)多年来一直被认为是一种很有前途的FPGA应用,特别是在紧密耦合的FPGA集群中,大规模、通用、低延迟的互连提供了任何其他COTS计算技术无法提供的通信能力。并行化的一部分MD计算,三维FFT,已经研究了以前;然而,对于可能的FPGA集群大小,范围限制计算(RL)更具挑战性。这里的动机是单芯片设计的直接复制受到板间带宽使用效率低下的影响。特别是,尽管RL中的通信是本地的,但可能的带宽限制将限制性能,除非在设计和分析中非常小心。在多芯片场景下,板间带宽是关键的约束条件,也是本工作的主要目标。我们从三个应用程序重构方面对其进行分析:工作负载分布、数据转发模式和数据位置。我们描述了如何通过配置工作负载分配和数据转发路径来平衡板载收发器端口的数量。我们还表明,通过操纵数据位置,可以有效地从单芯片设计迁移到多芯片设计,并且可以配置所需的总带宽以满足带宽限制。在多芯片场景下,板间带宽是关键的约束条件,也是本工作的主要目标。我们从三个应用程序重构方面对其进行分析:工作负载分布、数据转发模式和数据位置。我们描述了如何通过配置工作负载分配和数据转发路径来平衡板载收发器端口的数量。我们还表明,通过操纵数据位置,可以有效地从单芯片设计迁移到多芯片设计,并且可以配置所需的总带宽以满足带宽限制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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