An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories

Abstract

Fault injection is commonly used for evaluation of fault tolerance of safety-critical systems. Among the possible fault injection techniques, FPGA-based emulation is very attractive because of its superior performance. In particular, autonomous emulation technique can provide emulation speeds in the order of millions of faults per second. In this paper FPGA-based emulation is extended to circuits with embedded memories. To this purpose, an instrumented memory model is proposed that can be progressively enhanced to increase accuracy at the cost of a larger overhead. Also, an efficient fault injection mechanism is described. This model can be integrated in a seamless manner in an autonomous emulation system, as it is demonstrated using the LEON2 processor benchmark