{"title":"The WSP: a modular architecture for high performance signal processing (for radar)","authors":"J. Jackson, S.S. Sinor","doi":"10.1109/NRC.1988.10955","DOIUrl":null,"url":null,"abstract":"The authors briefly introduce the Westinghouse Signal Processor (WSP) architecture with emphasis on the manner in which various very high-speed integrated circuits (VHSICs) signals and data processing assets can be incorporated into the architecture to meet unique radar sensor requirements. Individual modules and sets of modules usable within this architecture are detailed. A software development facility (SDF) with software facilities to aid the hardware/software integration phase of application development is described and the steps involved in development of an application are illustrated with an example. The WSP is shown to be an open, modular architecture, fully Ada-programmable, with the capability to be configured at 10 billion operations per second (BOPS) of signal processing throughput and up to 80 million instructions per second (MIPS) of 32-b, general-purpose computing.<<ETX>>","PeriodicalId":237192,"journal":{"name":"Proceedings of the 1988 IEEE National Radar Conference","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 1988 IEEE National Radar Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NRC.1988.10955","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The authors briefly introduce the Westinghouse Signal Processor (WSP) architecture with emphasis on the manner in which various very high-speed integrated circuits (VHSICs) signals and data processing assets can be incorporated into the architecture to meet unique radar sensor requirements. Individual modules and sets of modules usable within this architecture are detailed. A software development facility (SDF) with software facilities to aid the hardware/software integration phase of application development is described and the steps involved in development of an application are illustrated with an example. The WSP is shown to be an open, modular architecture, fully Ada-programmable, with the capability to be configured at 10 billion operations per second (BOPS) of signal processing throughput and up to 80 million instructions per second (MIPS) of 32-b, general-purpose computing.<>