Adam G. Kimura, Jonathan Scholl, James Schaffranek, Matt Sutter, Andrew Elliott, Michael Strizich, G. Via
{"title":"A Decomposition Workflow for Integrated Circuit Verification and Validation","authors":"Adam G. Kimura, Jonathan Scholl, James Schaffranek, Matt Sutter, Andrew Elliott, Michael Strizich, G. Via","doi":"10.1007/s41635-019-00086-6","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":122880,"journal":{"name":"Journal of Hardware and Systems Security","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Hardware and Systems Security","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/s41635-019-00086-6","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}