{"title":"A Heterogeneous Dynamic Scheduling Minimized Make-span For Energy and Performance Balancing","authors":"Saba Fatima, V. M. Vishwanath","doi":"10.1109/ICAECC.2018.8479505","DOIUrl":null,"url":null,"abstract":"CPU-GPU accelerator based heterogeneous cloud computing systems can give enhanced energy efficiency and performance. Both energy efficiency and performance parameters are the vital factors in achieving High Performance Computing (HPC). To completely understand the strength of heterogeneous cloud computing architectures, software must efficiently use CPU-GPU processing and their power conserves capability. Dynamic Voltage and Frequency Scaling (DVFS) technique can be used to enable power conserving capabilities of CPU-GPU core architectures. Therefore, to distribute task load between host CPUs and GPU accelerators and reduce energy consumption, here, we have introduced a Heterogeneous Dynamic Scheduling Minimized Makespan (HDSMM) using CPU-GPU cores for heterogeneous cloud computing devices. Here, DVFS technique is distributed into CPU-DVFS and GPU-DVFS, for efficient resource utilization and to exploit power conserving features. Our proposed HDSMM model presents precise modeling for performance and energy efficiency distribution and finest frequency to achieve either best performance or lowest power consumption. Experimental results verify the superiority of our proposed HDSMM model in terms of energy consumption, average execution time and average power for scientific benchmark Montage.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAECC.2018.8479505","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
CPU-GPU accelerator based heterogeneous cloud computing systems can give enhanced energy efficiency and performance. Both energy efficiency and performance parameters are the vital factors in achieving High Performance Computing (HPC). To completely understand the strength of heterogeneous cloud computing architectures, software must efficiently use CPU-GPU processing and their power conserves capability. Dynamic Voltage and Frequency Scaling (DVFS) technique can be used to enable power conserving capabilities of CPU-GPU core architectures. Therefore, to distribute task load between host CPUs and GPU accelerators and reduce energy consumption, here, we have introduced a Heterogeneous Dynamic Scheduling Minimized Makespan (HDSMM) using CPU-GPU cores for heterogeneous cloud computing devices. Here, DVFS technique is distributed into CPU-DVFS and GPU-DVFS, for efficient resource utilization and to exploit power conserving features. Our proposed HDSMM model presents precise modeling for performance and energy efficiency distribution and finest frequency to achieve either best performance or lowest power consumption. Experimental results verify the superiority of our proposed HDSMM model in terms of energy consumption, average execution time and average power for scientific benchmark Montage.