Power comparison between high-speed electrical and optical interconnects for inter-chip communication

Abstract

Power dissipation between electrical and optical interconnects for high-speed inter-chip communication is compared. A power minimization strategy for optical interconnects is developed and its scaling trends are shown. Optical interconnect when compared with the state-of-the-art electrical interconnect yields lower power beyond a critical length (43cm at 6Gb/s and 100nm technology node). The critical length is fully characterized as a function of system requirements (bit rate and bit-error rate) and interconnect's end-device parameters (detector capacitance, receiver sensitivity and offset). Higher bit rates yield lower critical lengths making optical interconnects more favorable in the future.