V. Trujillo-Olaya, Jaime Velasco-Medina, J. C. López-Hernández
{"title":"Efficient Hardware Implementations for the Gaussian Normal Basis Multiplication Over GF(2163)","authors":"V. Trujillo-Olaya, Jaime Velasco-Medina, J. C. López-Hernández","doi":"10.1109/SPL.2007.371722","DOIUrl":null,"url":null,"abstract":"This article presents efficient hardware implementations for the Gaussian normal basis multiplication over GF(2163). Hardware implementations of GF(2m) multiplication algorithms are suitable to design elliptic curve cryptoprocessors, which allow that elliptic curve based cryptosystems implemented in hardware provide more physical security and higher performance than software implementations. In this case, the multipliers were designed using conventional, modified and fast- parallel algorithms for the Gaussian normal basis multiplication, the synthesis and simulation were carried out using Quartus II of Altera, and the designs were synthesized on the device EP2A15B724C7. The simulation results show that the multipliers designed present a very good performance using small area.","PeriodicalId":419253,"journal":{"name":"2007 3rd Southern Conference on Programmable Logic","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 3rd Southern Conference on Programmable Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2007.371722","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This article presents efficient hardware implementations for the Gaussian normal basis multiplication over GF(2163). Hardware implementations of GF(2m) multiplication algorithms are suitable to design elliptic curve cryptoprocessors, which allow that elliptic curve based cryptosystems implemented in hardware provide more physical security and higher performance than software implementations. In this case, the multipliers were designed using conventional, modified and fast- parallel algorithms for the Gaussian normal basis multiplication, the synthesis and simulation were carried out using Quartus II of Altera, and the designs were synthesized on the device EP2A15B724C7. The simulation results show that the multipliers designed present a very good performance using small area.