Design of a low-power CMOS baseband circuit for wideband CDMA testbed

Abstract

In this paper, the design and performance of a CMOS base-band circuit for WCDMA direct conversion receiver are presented. Consisting of one 5th-order anti-aliasing filter, one 4th-order tunable channel filter, and three variable gain amplifier (VGA) stages, the baseband chain provides 72 dB gain range with 2 dB gain step and is tunable to select three different bandwidths (from 5 MHz to 20 MHz radio-frequency spacing). It dissipates only 18 mW from a single 3V supply. The input IP3 is 10 dBm, and the input-referred noise in the passband is 41nV//spl radic/(Hz).