P. Foldesy, R. Carmona-Galán, Á. Zarándy, C. Rekeczky, Á. Rodríguez-Vázquez, T. Roska
{"title":"Digital processor array implementation aspects of a 3D multi-layer vision architecture","authors":"P. Foldesy, R. Carmona-Galán, Á. Zarándy, C. Rekeczky, Á. Rodríguez-Vázquez, T. Roska","doi":"10.1109/CNNA.2010.5430274","DOIUrl":null,"url":null,"abstract":"Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip is described. The 3D integration raises the question of signal routing, power distribution, and heat dissipation, which aspects are considered systematically in the digital processor array layer as part of the multi layer structure. We have developed a linear programming based evaluation system to identify the proper architecture and its parameters.","PeriodicalId":336891,"journal":{"name":"2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.2010.5430274","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip is described. The 3D integration raises the question of signal routing, power distribution, and heat dissipation, which aspects are considered systematically in the digital processor array layer as part of the multi layer structure. We have developed a linear programming based evaluation system to identify the proper architecture and its parameters.