Realization of the nullor using two CMOS CCII+s

D. Moro-Frías, E. Tlelo-Cuautle
{"title":"Realization of the nullor using two CMOS CCII+s","authors":"D. Moro-Frías, E. Tlelo-Cuautle","doi":"10.1109/ICEEE.2013.6676070","DOIUrl":null,"url":null,"abstract":"The nullor element is implemented herein by using two positive-type second generation current conveyors (CCII+s). The CCII+s are designed using standard CMOS integrated circuit technology of 0.35μm. The main advantage is the very low parasitic resistance of the CCII+ at terminal X (RX), in order to accomplish the ideal behavior of the nullor. HSPICE simulation results are provided and the usefulness of the designed nullor is highlighted through the implementation of a current-mode universal filter and a sinusoidal oscillator.","PeriodicalId":226547,"journal":{"name":"2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEE.2013.6676070","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The nullor element is implemented herein by using two positive-type second generation current conveyors (CCII+s). The CCII+s are designed using standard CMOS integrated circuit technology of 0.35μm. The main advantage is the very low parasitic resistance of the CCII+ at terminal X (RX), in order to accomplish the ideal behavior of the nullor. HSPICE simulation results are provided and the usefulness of the designed nullor is highlighted through the implementation of a current-mode universal filter and a sinusoidal oscillator.
用两个CMOS CCII+s实现零电平
零元是通过使用两个正型二代电流传送带(CCII+s)来实现的。CCII+s采用0.35μm的标准CMOS集成电路技术设计。其主要优点是CCII+在X端(RX)的寄生电阻非常低,以实现零极器的理想行为。给出了HSPICE仿真结果,并通过一个电流型通用滤波器和一个正弦振荡器的实现突出了所设计的零电平的实用性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信
小红书