Hybrid LBDD PWM modulator for digital class-BD audio amplifier based on STM32F407VGT6 microcontroller and analog DLL

J. Jasielski, S. Kuta, W. Kołodziejski, W. Machowski
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引用次数: 3

Abstract

In the paper a new architecture and implementation of the 9-bit hybrid LBDD PWM modulator for digital Class-BD audio amplifier has been proposed. First, the PCM audio signal is transformed into the requantized to 9-bit resolution DPWM data, using LBDD algorithm. Then the 9-bit DPWM data are converted into the two physical trains of PWM pulses to control the output power transistors, using two hybrid digital to time converters (HDTC). The HDTC converts 6 MSB data on the base counter method using advanced-control timers TIM1 and TIM8 of the STM32F407VGT6 microcontroller, while the remaining 4 LSB data - using a quantizer system based on the tapped voltage controlled delay line (TVCDL) put into the ADLL loop, which have been designed in 180nm CMOS technology from UMC. A basic feasibility study of proposed configuration has been performed.
基于STM32F407VGT6单片机和模拟DLL的混合LBDD PWM调制器用于数字类bd音频放大器
本文提出了一种用于数字bd类音频放大器的9位混合式LBDD PWM调制器的新结构和实现方法。首先,利用LBDD算法将PCM音频信号转化为所需的9位分辨率DPWM数据。然后将9位DPWM数据转换成两个物理序列的PWM脉冲,通过两个数字-时间混合转换器(HDTC)控制输出功率晶体管。HDTC使用STM32F407VGT6微控制器的先进控制定时器TIM1和TIM8转换基本计数器上的6个MSB数据,而其余4个LSB数据则使用基于分接压控延迟线(TVCDL)的量化系统,该量化系统采用联华电子180nm CMOS技术设计,并置于ADLL环路中。对所提出的配置进行了基本的可行性研究。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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