A CMOS 180nm class-AB power amplifier with intergrated phase linearizer for BLE 4.0 achieving 11.5dB gain, 38.4% PAE and 20dBm OIP3

Premmilaah Gunasegaran, J. Rajendran, H. Ramiah
{"title":"A CMOS 180nm class-AB power amplifier with intergrated phase linearizer for BLE 4.0 achieving 11.5dB gain, 38.4% PAE and 20dBm OIP3","authors":"Premmilaah Gunasegaran, J. Rajendran, H. Ramiah","doi":"10.1109/PRIMEASIA.2017.8280364","DOIUrl":null,"url":null,"abstract":"In this paper, the design of a low power consumption linear power amplifier (PA) for Bluetooth Low Energy (BLE) application is presented. A passive linearizer is integrated at the input of the CMOS PA to nullify the effect of the Cgs capacitance thus improving the linearity and efficiency without trading-off the power gain and stability. The PA delivers more than 10dB power gain from 2.4GHz to 2.5GHz. At centre frequency of 2.45GHz, the PA exhibits gain of 11.5dB with corresponding PAE of 38.4% and maximum output power of 15dBm followed by OIP3 of 20.3dBm. This performance is achieved with supply voltage headroom of 1.8V. The proposed linearization scheme serves to be a good solution to improve the linear output power of a CMOS PA without trading off other critical parameters.","PeriodicalId":335218,"journal":{"name":"2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PRIMEASIA.2017.8280364","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

In this paper, the design of a low power consumption linear power amplifier (PA) for Bluetooth Low Energy (BLE) application is presented. A passive linearizer is integrated at the input of the CMOS PA to nullify the effect of the Cgs capacitance thus improving the linearity and efficiency without trading-off the power gain and stability. The PA delivers more than 10dB power gain from 2.4GHz to 2.5GHz. At centre frequency of 2.45GHz, the PA exhibits gain of 11.5dB with corresponding PAE of 38.4% and maximum output power of 15dBm followed by OIP3 of 20.3dBm. This performance is achieved with supply voltage headroom of 1.8V. The proposed linearization scheme serves to be a good solution to improve the linear output power of a CMOS PA without trading off other critical parameters.
一种集成相位线性器的180nm ab类CMOS功率放大器,可实现11.5dB增益,38.4% PAE和20dBm OIP3
本文设计了一种低功耗线性功率放大器,用于低功耗蓝牙(BLE)应用。在CMOS PA的输入端集成了一个无源线性器,以消除Cgs电容的影响,从而在不牺牲功率增益和稳定性的情况下提高线性度和效率。扩音器在2.4GHz至2.5GHz范围内提供超过10dB的功率增益。在中心频率为2.45GHz时,放大器的增益为11.5dB,相应的PAE为38.4%,最大输出功率为15dBm, OIP3为20.3dBm。这种性能是在电源电压净空为1.8V的情况下实现的。提出的线性化方案是一个很好的解决方案,以提高CMOS放大器的线性输出功率,而不牺牲其他关键参数。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信