Design of ternary D latch using carbon nanotube field effect transistors

Abstract

This paper presents a novel design of ternary D-latch using carbon nanotube field effect transistors. Ternary logic is a promising alternative to the conventional binary logic design technique, since it is possible to accomplish simplicity and energy efficiency in modern digital design due to the reduced circuit overhead such as interconnects and chip area. In this paper novel design of D-latch for ternary logic based on CNTFET, using only basic gates STI, NTI, NOR, NAND and transmission gate, is proposed.