Design of FPGA based horizontal velocity computation and image storage unit for lunar lander

2017 4th IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics (UPCON) Pub Date : 2017-10-01 DOI:10.1109/UPCON.2017.8251104

Tanisha Bhatia, J. Laha, A. Maji, Arindam Mal, K. Subhalakshmi

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引用次数: 1

Abstract

Space field has experienced vigorous advancement with respect to evolution of vision system, image storage and processing. Real time image processing has become one of the most important tools for navigation and landing for planetary and lunar missions. Information of horizontal velocity with high accuracy will be required to do accurate pin point landing. For the testability of such a system as well as to have the understanding of Lander dynamics, prior landing image sequences are required to initially testing the algorithm [1]. This paper deals with FPGA based processing on Image sequence to find the relative velocity and also implements Image Storage in a microSD card. Landing sequence is stored in SD card and post landing they are downloaded. These images provide a very useful information about lighting, lander dynamics to fine tune algorithm for future mission. Besides this image data serves the testability during various phases of testing during development.

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基于FPGA的月球着陆器水平速度计算与图像存储单元设计

空间领域在视觉系统的进化、图像存储和处理等方面都经历了蓬勃的发展。实时图像处理已成为行星和月球任务导航和着陆的最重要工具之一。要实现准确的定点着陆，需要高精度的水平速度信息。为了该系统的可测试性以及对着陆器动力学的了解，需要事先使用着陆图像序列对算法进行初步测试[1]。本文利用FPGA对图像序列进行处理，求出图像序列的相对速度，并在microSD卡上实现图像存储。着陆序列存储在SD卡中，着陆后下载。这些图像提供了非常有用的信息，关于照明，着陆器动力学微调算法，为未来的任务。此外，该图像数据在开发期间的各个测试阶段提供可测试性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2017 4th IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics (UPCON)

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