A model for imaging system-on-chip manufacturing costs

Abstract

This work describes some of the issues faced when integrating a CMOS image sensor into a system-on-chip (SoC). A simple method is proposed for estimating the manufacturing costs of imaging SoCs at several silicon processes using readily available information sources. A low-cost imaging SoC with integral DSP is presented and its manufacturing cost calculated. The results indicated that for the example given, processes of 0.18 /spl mu/m or smaller only start to become more economical than older processes at $2.80 per unit for 500k units.