High performance wideband digital predistortion platform for 3G+ applications with better than 55dBc over 40 MHz bandwidth

A. Kwan, O. Hammi, M. Helaoui, F. Ghannouchi
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引用次数: 14

Abstract

In this paper, a hardware-software system is proposed for the wideband characterization and linearization of power amplifiers exhibiting memory effects. The designed prototype includes a signal generation and a feedback paths for applications in the 1GHz to 2.5GHz frequency band and supports instantaneous bandwidths of up to 60MHz. The hardware platform is coupled with a software interface that implements the required data processing algorithms for the synthesis of the digital predistortion function. Experimental validation is carried out on a 3G power amplifier driven by an eight-carrier WCDMA signal. The digital predistortion is implemented using the twin-nonlinear two-box model with only 30 parameters and leads to a better than 55dBc ACLR for an input signal having 40MHz instantaneous bandwidth. To the best of the authors' knowledge this represents the best digital predistortion performances in terms of bandwidth and complexity.
高性能宽带数字预失真平台,适用于3G+应用,在40mhz带宽下优于55dBc
本文提出了一种用于具有记忆效应的功率放大器的宽带特性和线性化的硬件软件系统。设计的原型包括用于1GHz至2.5GHz频段应用的信号生成和反馈路径,并支持高达60MHz的瞬时带宽。硬件平台与软件接口相结合,该软件接口实现了合成数字预失真函数所需的数据处理算法。在8载波WCDMA信号驱动的3G功率放大器上进行了实验验证。数字预失真采用双非线性双箱模型实现,只有30个参数,对于具有40MHz瞬时带宽的输入信号,其ACLR优于55dBc。据作者所知,这代表了在带宽和复杂性方面最好的数字预失真性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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