2D carrier mapping in Si/sub 1-x/Ge/sub x/ source/drain regions of PMOSFETs used in a production device by scanning capacitance microscopy

Abstract

This article presents the results of a 2D carrier profile analysis of a finished 90 nm MPU with strained silicon by scanning capacitance microscopy (SCM). First, we show that the carrier concentration measurement dynamic range of SCM spans 10/sup 14/-10/sup 20/ cm/sup -3/. Then we present results that demonstrate p-n junction delineation on PMOS transistor with embedded SiGe in the source/drain regions. A big difference of carrier concentration in SiGe with respect to the surrounding silicon tends to indicate that in-situ boron doping was employed during SiGe S/D growth. We also report observed anomalous lateral "overgrowth" of SiGe over field oxide that may compromise manufacturing yield.