Subhankar Bhattacharjee, S. Sil, Sayan Dey, A. Chakrabarti
{"title":"Simulation, design and analysis of a low power MIMO-OFDM system and its implementation on FPGA","authors":"Subhankar Bhattacharjee, S. Sil, Sayan Dey, A. Chakrabarti","doi":"10.1109/ReTIS.2011.6146846","DOIUrl":null,"url":null,"abstract":"In the world of modern communication systems, several newer techniques have come around to replace the conventional techniques of high speed data communication. As wireless communication protocols developed and user pressure started to increase, it became an absolute necessity to develop multi-user supporting techniques like Orthogonal Frequency Division Multiplexing (OFDM), Multi Carrier Code Division Multiple Access (MC-CDMA) for data security and reliability of data transmission. In this work, an effort has been made to simulate and design a low power consuming custom hardware for MIMO-OFDM system based on Field Programmable Gate Array (FPGA). Both the transmitters and the receivers were designed in the simulation environment targeting Xilinx Spartan 3E and Spartan 3A FPGA devices. The design was also implemented on the mentioned FPGA hardware and real experiments were carried out for the verification of the design. Our design proves that a very low power system can be designed using an FPGA device which can provide much higher data rate and very less power as compared to the conventional systems and it can also be reconfigured according to the requirement.","PeriodicalId":137916,"journal":{"name":"2011 International Conference on Recent Trends in Information Systems","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 International Conference on Recent Trends in Information Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ReTIS.2011.6146846","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
In the world of modern communication systems, several newer techniques have come around to replace the conventional techniques of high speed data communication. As wireless communication protocols developed and user pressure started to increase, it became an absolute necessity to develop multi-user supporting techniques like Orthogonal Frequency Division Multiplexing (OFDM), Multi Carrier Code Division Multiple Access (MC-CDMA) for data security and reliability of data transmission. In this work, an effort has been made to simulate and design a low power consuming custom hardware for MIMO-OFDM system based on Field Programmable Gate Array (FPGA). Both the transmitters and the receivers were designed in the simulation environment targeting Xilinx Spartan 3E and Spartan 3A FPGA devices. The design was also implemented on the mentioned FPGA hardware and real experiments were carried out for the verification of the design. Our design proves that a very low power system can be designed using an FPGA device which can provide much higher data rate and very less power as compared to the conventional systems and it can also be reconfigured according to the requirement.