An OpenGL Compliant Hardware Implementation of a Graphic Processing Unit Using Field Programmable Gate Array–System on Chip Technology

Alexander E. Beasley, C. Clarke, R. Watson
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引用次数: 5

Abstract

FPGA-SoC technology provides a heterogeneous platform for advanced, high-performance systems. The System on Chip (SoC) architecture combines traditional single and multiple core processor topologies with flexible FPGA fabric. Dynamic reconfiguration allows the hardware accelerators to be changed at run-time. This article presents a novel OpenGL compliant GPU design implemented on an FPGA. The design uses an FPGA-SoC environment allowing the embedded processor to offload graphics operation onto a more suitable architecture. To the authors’ knowledge, this is a first. The graphics processor consists of GLSL compliant shaders, an efficient Barycentric Rasterizer, and a draw mode manager. Performance analysis shows the throughput of the shaders to be hundreds of millions of vertices per second. The design uses both pipelining and resource reuse to optimise throughput and resource use, allowing implementation on a low-cost, FPGA device. Pixel processing rates from this implementation are almost 80% higher than other FPGA implementations. Power consumption compared with comparative embedded devices shows the FPGA consuming as little as 2% of the power of a Mali device, and an up to 11.9-fold increase in efficiency compared to an Nvidia RTX 2060 - Turing architecture device.
基于现场可编程门阵列芯片技术的图形处理单元的OpenGL兼容硬件实现
FPGA-SoC技术为先进的高性能系统提供了异构平台。片上系统(SoC)架构将传统的单核和多核处理器拓扑结构与灵活的FPGA结构相结合。动态重新配置允许在运行时更改硬件加速器。本文提出了一种基于FPGA的新型OpenGL兼容GPU设计。该设计使用FPGA-SoC环境,允许嵌入式处理器将图形操作卸载到更合适的架构上。据作者所知,这是第一次。图形处理器由符合GLSL的着色器、高效的Barycentric光栅化器和绘制模式管理器组成。性能分析显示,着色器的吞吐量为每秒数亿个顶点。该设计使用流水线和资源重用来优化吞吐量和资源使用,允许在低成本的FPGA设备上实现。该实现的像素处理速率几乎比其他FPGA实现高80%。与嵌入式设备的功耗相比,FPGA功耗仅为Mali设备的2%,与Nvidia RTX 2060 -图灵架构设备相比,效率提高了11.9倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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