{"title":"Wide Band CMOS Power Amplifier with High Flatness Using Inter-Digit Transformer and RC-Feedback","authors":"Ja-Soo Cho, Jaeyong Lee, Changkun Park","doi":"10.1109/WAMICON57636.2023.10124897","DOIUrl":null,"url":null,"abstract":"In this study, a Ka-band CMOS power amplifier (PA) with wide bandwidth and high flatness to support the full bandwidth of 5G mobile communication was proposed. To obtain wide bandwidth, RC-feedback and inter-digit transformer techniques were applied to the driver stage and matching networks, respectively. In addition, a diode linearizer was applied to the power stage to compensate for the deteriorated output power due to securing wide bandwidth. To verify the feasibility of the proposed Ka-band PA, we designed the PA using a 65-nm RFCMOS process. The designed PA occupies the core area of 0.174 mm2. The measured 1 dB bandwidth and gain were higher than 12 GHz and 13.1 dB, respectively. The measured saturation power, P1dB, and PAE were above 12.53 dBm, 10.8 dBm, and 9.18%, respectively","PeriodicalId":270624,"journal":{"name":"2023 IEEE Wireless and Microwave Technology Conference (WAMICON)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Wireless and Microwave Technology Conference (WAMICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WAMICON57636.2023.10124897","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this study, a Ka-band CMOS power amplifier (PA) with wide bandwidth and high flatness to support the full bandwidth of 5G mobile communication was proposed. To obtain wide bandwidth, RC-feedback and inter-digit transformer techniques were applied to the driver stage and matching networks, respectively. In addition, a diode linearizer was applied to the power stage to compensate for the deteriorated output power due to securing wide bandwidth. To verify the feasibility of the proposed Ka-band PA, we designed the PA using a 65-nm RFCMOS process. The designed PA occupies the core area of 0.174 mm2. The measured 1 dB bandwidth and gain were higher than 12 GHz and 13.1 dB, respectively. The measured saturation power, P1dB, and PAE were above 12.53 dBm, 10.8 dBm, and 9.18%, respectively