{"title":"Real-time emulation of DSP applications on programmable DSPs and FPGAs","authors":"R. Lauwereins, M. Adé, S. Note","doi":"10.1109/ICECS.1996.582928","DOIUrl":null,"url":null,"abstract":"The paper describes the RETIDES design flow and building blocks which allow for fast and cost-effective prototyping of complete DSP systems on heterogeneous re-usable hardware platforms consisting of general purpose DSP processors, core processors and field programmable gate arrays. Early experiences with two classes of industrial audio and speech applications are reported.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.1996.582928","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The paper describes the RETIDES design flow and building blocks which allow for fast and cost-effective prototyping of complete DSP systems on heterogeneous re-usable hardware platforms consisting of general purpose DSP processors, core processors and field programmable gate arrays. Early experiences with two classes of industrial audio and speech applications are reported.