First Demonstration of 1-bit Erase in Vertical NAND Flash Memory

Abstract

We propose for the first time a method for erasing one selected cell in Vertical NAND (VNAND) flash memory. By controlling the voltage applied to the terminals (switch devices and cells) of the VNAND string array, 1-bit erase (GIDL generation) of one selected cell and erase inhibition (GIDL suppression) of unselected cells are successfully verified. Compared to the existing method, the 1-bit erase method reduces the current fluctuation by 17 times at an IBL of 50 nA and reduces the Vth dispersion of >2 V to ~0.2 V or less.