{"title":"Measuring the coverage of node shorts by internal access methods","authors":"W. Debany","doi":"10.1109/VTEST.1991.208161","DOIUrl":null,"url":null,"abstract":"A method is presented that determines the coverage of shorts (bridging failures) by internal access techniques that provide node observability such as CMOS I/sub DD/ monitoring, CrossCheck, and voltage contrast. This method requires neither fault simulation nor listing of faults, and it is exact.<<ETX>>","PeriodicalId":157539,"journal":{"name":"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1991.208161","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A method is presented that determines the coverage of shorts (bridging failures) by internal access techniques that provide node observability such as CMOS I/sub DD/ monitoring, CrossCheck, and voltage contrast. This method requires neither fault simulation nor listing of faults, and it is exact.<>