Comparison of simultaneous switching noise measurements using netlist compatible multilayer ceramic packages having variously compromised reference planes

Abstract

This paper presents a comparison of simultaneous switching-output noise and skew measurements taken with a 0.12 /spl mu/m CMOS test chip on three flip-chip, multilayer-ceramic, single-chip modules (SCMs) having differing amounts of reference mesh and power-supply vias in the package under the chip outline. Missing reference mesh equates to poor current-return paths for signals traversing such package regions. Missing power-supply vias equate to increased supply inductance. The test chip has 732 individually programmable off-chip output buffers, each of which can be individually probed. The first package has full reference mesh under the chip. The second package has reference mesh only in the upper half of the package under the chip. The third package has essentially no reference mesh under the chip. Technology and design features of the chip and package test vehicles are described. Noise and delay measurement techniques and results are presented. The large number of off-chip output buffers enables a statistical view of transmitted noise and skew behavior as signal current-return paths are compromised. This analysis is graphically presented and discussed. Several types of simulations, including extracted loop inductance and full-wave simulation of coupling parameters, are presented. These simulations elucidate the large differences in measured transmitted noise and off-chip output buffer skew between the three packages.