Investigation of the reliability degradation of scaled SONOS memory transistors

Abstract

The polarity-dependent device degradation during AC stress of polysicilicon-oxide-nitride-oxide-silicon (SONOS) transistor poses considerable reliability challenges for scaled SONOS gate oxide thicknesses. However, the mechanism responsible for the endurance degradation has been scarcely studied so far. Especially electrons injected from the gate are supposed to be responsible for the degradation. An on-chip test circuit was developed to measure those gate currents. A clear correlation was found with retention-after-cycling experiments and interface degradation measured with the pulsed-capacitance technique. Based on the results, defect generation in the tunnel oxide was identified as the main degradation mechanism. The results are supported by electrical simulation of the transient behavior of the SONOS gate dielectric during program and erase.