Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures

A. Prodromou, A. Venkat, D. Tullsen
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引用次数: 6

Abstract

Heterogeneous architectures have become increasingly common. From co-packaging small and large cores, to GPUs alongside CPUs, to general-purpose heterogeneous-ISA architectures with cores implementing different ISAs. As diversity of execution cores grows, predictive models become of paramount importance for scheduling and resource allocation. In this paper, we investigate the capabilities of performance predictors in a heterogeneous-ISA setting, as well as the predictors' effects on scheduler quality. We follow an unbiased feature selection methodology to identify the optimal set of features for this task, instead of pre-selecting features before training. We propose metrics that bridge the gap between traditional prediction accuracy metrics and a scheduler's performance. We further present our evaluation methodology, which was meticulously designed with this study in mind, and finally, we incorporate our findings in ML-based schedulers and evaluate their sensitivity to the underlying system's level of heterogeneity.
异构isa多核架构的预测调度器解译
异构架构已经变得越来越普遍。从共同封装小核和大核,到gpu和cpu,再到通用的异构isa架构,内核实现不同的isa。随着执行核心多样性的增长,预测模型对于调度和资源分配变得至关重要。在本文中,我们研究了性能预测器在异构isa设置中的能力,以及预测器对调度程序质量的影响。我们采用无偏特征选择方法来识别该任务的最佳特征集,而不是在训练前预先选择特征。我们提出的指标弥补了传统预测精度指标和调度器性能之间的差距。我们进一步提出了我们的评估方法,该方法是根据这项研究精心设计的,最后,我们将我们的发现纳入基于ml的调度器中,并评估了它们对底层系统异质性水平的敏感性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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