Hadi Esmaelzadeh, Hamed Farshbaf, Carlos P. Lucas, D. M. Fakhraie
{"title":"Digital implementation for conic section function networks","authors":"Hadi Esmaelzadeh, Hamed Farshbaf, Carlos P. Lucas, D. M. Fakhraie","doi":"10.1109/ICM.2004.1434725","DOIUrl":null,"url":null,"abstract":"A digital implementation is presented for a neural network, which uses conic section function neurons. This network is employed in a digit pattern recognition application. The neural network is trained without any consideration about non-idealities of hardware implementation and then obtained weight parameters are converted to fixed-point bit-string format in order to match hardware implementation. Controlling the number of bits used in this conversion, forces a trade off between accurate operation of the network and size of the hardware. Finding the optimum number of bits, steps are taken for implementation of network. Simulation results in different levels of the prepared design flow are presented.","PeriodicalId":359193,"journal":{"name":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2004.1434725","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
A digital implementation is presented for a neural network, which uses conic section function neurons. This network is employed in a digit pattern recognition application. The neural network is trained without any consideration about non-idealities of hardware implementation and then obtained weight parameters are converted to fixed-point bit-string format in order to match hardware implementation. Controlling the number of bits used in this conversion, forces a trade off between accurate operation of the network and size of the hardware. Finding the optimum number of bits, steps are taken for implementation of network. Simulation results in different levels of the prepared design flow are presented.