A systematic approach to bit recursive systolic array design

K.R. Liu, K. Yao
{"title":"A systematic approach to bit recursive systolic array design","authors":"K.R. Liu, K. Yao","doi":"10.1109/ARRAYS.1988.18105","DOIUrl":null,"url":null,"abstract":"This approach provides a systematic way to design a recursive computational architecture instead of a bit-slice architecture. Since the relationship is much stronger at the bit level than at the work level and most relations can be described as shift-and-operate computations, these kinds of relations can be formulated as recursive equations, from which the systolic array can be built without deriving the dependence graph of the bit-level computation. Some design examples for bit-recursive systolic array presented: multiplier, inner product and convolution correlation.<<ETX>>","PeriodicalId":339807,"journal":{"name":"[1988] Proceedings. International Conference on Systolic Arrays","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1988] Proceedings. International Conference on Systolic Arrays","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ARRAYS.1988.18105","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

This approach provides a systematic way to design a recursive computational architecture instead of a bit-slice architecture. Since the relationship is much stronger at the bit level than at the work level and most relations can be described as shift-and-operate computations, these kinds of relations can be formulated as recursive equations, from which the systolic array can be built without deriving the dependence graph of the bit-level computation. Some design examples for bit-recursive systolic array presented: multiplier, inner product and convolution correlation.<>
一种系统的位递归收缩阵列设计方法
这种方法提供了一种系统的方法来设计递归计算体系结构,而不是位片体系结构。由于比特级的关系比工作级强得多,并且大多数关系可以描述为移位和操作计算,因此这些关系可以表示为递归方程,由此可以构建收缩数组,而无需推导比特级计算的依赖图。给出了位递归收缩阵列的几个设计实例:乘法器、内积和卷积相关
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