A Power Efficient Ka-Band MMIC Active Frequency Doubler with Output Amplifier

B. Biswas, G. Kumar
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引用次数: 3

Abstract

Design and realization of a two stage, 17.5 GHz to 35.0 GHz active frequency doubler with output amplifier using two GaAs based pHEMTs has been presented in this paper in MMIC form. Fabricated MMIC chip has achieved 10 dB of conversion gain at 35 GHz for 0 to 5 dBm of input power at 17.5 GHz. Saturated output power obtained is 15 dBm. Fractional bandwidth of more than 14% has been observed for 2 dB variation in output power. Total dc power consumption of the chip is 110 mW. Fundamental and spurious rejection is in excess of 45 dBc. Phase noise degradation through the circuit is close to 6 dB, which is the minimum theoretical value. The designed power efficient frequency doubler is highly stable, and capable of producing high quality output spectrum with sufficient power.
带输出放大器的高效功率ka波段MMIC有源倍频器
本文以MMIC的形式设计并实现了一种两级、17.5 GHz至35.0 GHz有源倍频器,其输出放大器采用两个基于GaAs的phemt。自制的MMIC芯片在17.5 GHz频率下,在0 ~ 5 dBm的输入功率下,在35 GHz频率下实现了10 dB的转换增益。饱和输出功率为15dbm。对于输出功率的2db变化,已经观察到分数带宽超过14%。该芯片的总直流功耗为110 mW。基本和杂散抑制超过45 dBc。通过电路的相位噪声衰减接近6db,这是最小的理论值。所设计的功率高效倍频器具有高稳定性,能够在足够的功率下产生高质量的输出频谱。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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