{"title":"Conversion time analysis of time domain digital pixel sensor in uniform and non-uniform quantizers","authors":"A. Bermak","doi":"10.1109/IWSOC.2005.47","DOIUrl":null,"url":null,"abstract":"This paper analyzes the conversion time of a time domain digital pixel sensor based on pulse width modulation scheme. Two quantization schemes are studied namely the uniform time domain (UQ) and the non uniform time domain (NUQ) quantizers. It is shown that the latter scheme not only permits to linearize the non-linear response of a PWM vision sensor but also allows to significantly speed-up the conversion time particularly for wide dynamic range and lower coding resolution. The VLSI architecture of a reconfigurable DPS for variable spatial and coding resolutions is proposed in 1-poly, 5 metal CMOS 0.35/spl mu/m n-well process.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2005.47","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper analyzes the conversion time of a time domain digital pixel sensor based on pulse width modulation scheme. Two quantization schemes are studied namely the uniform time domain (UQ) and the non uniform time domain (NUQ) quantizers. It is shown that the latter scheme not only permits to linearize the non-linear response of a PWM vision sensor but also allows to significantly speed-up the conversion time particularly for wide dynamic range and lower coding resolution. The VLSI architecture of a reconfigurable DPS for variable spatial and coding resolutions is proposed in 1-poly, 5 metal CMOS 0.35/spl mu/m n-well process.