H. Feng, G. Jelodin, Ke Gong, R. Zhan, Q. Wu, C. Chen, Albert Wang
{"title":"Super compact RFIC inductors in 0.18 /spl mu/m CMOS with copper interconnects","authors":"H. Feng, G. Jelodin, Ke Gong, R. Zhan, Q. Wu, C. Chen, Albert Wang","doi":"10.1109/MWSYM.2002.1011680","DOIUrl":null,"url":null,"abstract":"Design of super compact on-chip inductors with deep-shrunk dimension of 22 /spl mu/m/spl times/23 /spl mu/m, as opposed to several hundreds /spl mu/m by several hundreds gm, is reported. Implemented in a 6-metal all-copper 0.18 /spl mu/m CMOS process, a flat inductor value of 10 nH up to 4 GHz, satisfactory to many typical RFIC applications, is achieved. The aggressive shrinkage reduces parasitic capacitance substantially and makes it realistic and cost-effective to realize single-chip RFICs in very deep sub-micron technologies. A new inductor model is proposed for accuracy. A 2.4 GHz LNA circuit with on-chip matching using the compact inductor is demonstrated.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"72 7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2002.1011680","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
Abstract
Design of super compact on-chip inductors with deep-shrunk dimension of 22 /spl mu/m/spl times/23 /spl mu/m, as opposed to several hundreds /spl mu/m by several hundreds gm, is reported. Implemented in a 6-metal all-copper 0.18 /spl mu/m CMOS process, a flat inductor value of 10 nH up to 4 GHz, satisfactory to many typical RFIC applications, is achieved. The aggressive shrinkage reduces parasitic capacitance substantially and makes it realistic and cost-effective to realize single-chip RFICs in very deep sub-micron technologies. A new inductor model is proposed for accuracy. A 2.4 GHz LNA circuit with on-chip matching using the compact inductor is demonstrated.