State-of-the-art of the wafer scale ELSA project

Abstract

ELSA project concerns massively parallel architectures on silicon dedicated especially to low-level image processing. Real-time low-level image processing demands a huge amount of computing power. Fortunately, the algorithms encountered in this field are naturally regular which suggests a regular architecture to solve them. One of the most efficient scheme is array processors. This array processor has been implemented on a whole wafer instead of implementing it in VLSI chips each containing a few processing elements. Potential advantages of wafer scale integration over conventional VLSI systems include lower power, higher speed and small volume. However, WSI suffers from low yield. Redundancy and reconfiguration techniques are used to enhance the overall yield. Both of these have been implemented in ELSA. Three software packages have been developed to completely (re)configure the wafer and build a working target array.<>