Model based mask process correction for EUV Mask

Abstract

Mask process correction (MPC) played a key part improving yield in 14 nm technology node and below using deep ultraviolet lithography (DUVL). Extreme ultraviolet lithography (EUVL) is entering an industry production phase for 7 nm logic and is under development for next node logic and memory applications. A key benefit of EUVL for logic interconnect lithography comes from the ability to pattern layers at aggressive pitch using a single exposure. Mask critical dimension targeting was found to be a critical factor for yielding wafer process, MPC will be necessary to correct for mask process errors. This paper will focus on building MPC models for EUV mask processes exposed on a variable shape beam lithography tool.