Y. Kagenishi, H. Hirano, A. Shibayama, H. Kotani, N. Moriwaki, M. Kojima, T. Sumi
{"title":"Low power self refresh mode DRAM with temperature detecting circuit","authors":"Y. Kagenishi, H. Hirano, A. Shibayama, H. Kotani, N. Moriwaki, M. Kojima, T. Sumi","doi":"10.1109/VLSIC.1993.920531","DOIUrl":null,"url":null,"abstract":"To reduce self refresh mode current, a temperature detecting circuit, back bias generator and voltage down convertor, are developed. Using these circuits in a 16M DRAM, 33 /spl mu/A consuming current in self refresh mode has been realized at Vcc=5V, Ta=25 /spl deg/C.","PeriodicalId":127467,"journal":{"name":"Symposium 1993 on VLSI Circuits","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1993 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1993.920531","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
Abstract
To reduce self refresh mode current, a temperature detecting circuit, back bias generator and voltage down convertor, are developed. Using these circuits in a 16M DRAM, 33 /spl mu/A consuming current in self refresh mode has been realized at Vcc=5V, Ta=25 /spl deg/C.
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