PCUBE: A performance driven placement algorithm for low power designs

Abstract

PCUBE, a performance driven placement algorithm for minimizing power consumption, is described. The problem is formulated as a constrained programming problem and is solved in two phases: global optimization and slot assignment. The objective function used during either phase is the total weighted net length, where net weights are calculated as the expected switching activities of gates driving the nets. Constraints on total path delays are also accounted for. On average, PCUBE reduces power consumption due to interconnect by 7% at the expense of 8% increase in the total wire length and 2% increase in circuit delay.<>