A 6 GHz 130 nm CMOS Harmonic Recombination RF Receiver Front-End Using N-Path Filtering

Nakisa Shams, A. Abbasi, F. Nabki
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引用次数: 4

Abstract

An RF receiver front-end using two feedforward N-path switching filters and harmonic-recombination configuration is presented. As the time-variant nature of the N-path filter introduces multiple frequency translations, third harmonic selection of the switching frequency rather than the fundamental helps to reduce the input frequency of the multiphase clock generator by a factor of three. The proposed 5.9-7.1 GHz RF receiver operates at the third harmonic of the local oscillator, thanks to the combination of an N-Path switching filter and a harmonic recombination architecture. The receiver is implemented in a 130 nm CMOS technology and operates from a 1.2 V supply. Post-layout simulation results show that, for a 6 GHz RF input, the receiver provides a harmonic rejection of 45 and 55 dB for the first and second harmonics, respectively. A noise figure of 5.5 dB at a 16 MHz baseband frequency is achieved, and an input matching of less than -15 dB is attained over the desired frequency band.
一种采用n路滤波的6ghz 130nm CMOS谐波复合射频接收机前端
提出了一种采用两个前馈n路开关滤波器和谐波复合结构的射频接收机前端。由于n路滤波器的时变特性引入了多次频率平移,开关频率的三次谐波选择而不是基频选择有助于将多相时钟发生器的输入频率降低三倍。所提出的5.9-7.1 GHz射频接收器工作在本振的三次谐波,这要归功于n路开关滤波器和谐波重组架构的组合。该接收器采用130纳米CMOS技术,工作电压为1.2 V。布局后仿真结果表明,对于6 GHz射频输入,接收机的一次谐波抑制为45 dB,次谐波抑制为55 dB。在16 MHz基带频率下实现了5.5 dB的噪声系数,并且在期望的频带上实现了小于-15 dB的输入匹配。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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