Thawatchai Thongleam, S. Suwansawang, Varakorn Kasensuwan
{"title":"Low-voltage high gain, high CMRR and rail-to-rail bulk-driven Op-amp using feedforward technique","authors":"Thawatchai Thongleam, S. Suwansawang, Varakorn Kasensuwan","doi":"10.1109/ISCIT.2013.6645930","DOIUrl":null,"url":null,"abstract":"A low voltage fully differential CMOS Op-amp is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors while the output stage are connected in the class AB operation using by QFG transistors techniques. The auxiliary transconductance feedforward circuit are employed to circuit operate high gain and high CMRR. The proposed amplifier is designed using 0.18 μm CMOS technology, and verify by HSPICE. The simulation results show rail-to-rail input and output swings. The open-loop gain and phase margin are 70.6 dB and 55°. Eventually, the gain-bandwidth product, the CMRR, and the power consumption are 31.7 MHz (CL=20 pF), 158.8 dB (at 1 kHz) and 220.35 μW, respectively.","PeriodicalId":356009,"journal":{"name":"2013 13th International Symposium on Communications and Information Technologies (ISCIT)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 13th International Symposium on Communications and Information Technologies (ISCIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCIT.2013.6645930","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
A low voltage fully differential CMOS Op-amp is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors while the output stage are connected in the class AB operation using by QFG transistors techniques. The auxiliary transconductance feedforward circuit are employed to circuit operate high gain and high CMRR. The proposed amplifier is designed using 0.18 μm CMOS technology, and verify by HSPICE. The simulation results show rail-to-rail input and output swings. The open-loop gain and phase margin are 70.6 dB and 55°. Eventually, the gain-bandwidth product, the CMRR, and the power consumption are 31.7 MHz (CL=20 pF), 158.8 dB (at 1 kHz) and 220.35 μW, respectively.