A low power 170 MHz discrete-time analog FIR filter

Abstract

A 170 MHz analog FIR filter operating from a single 3.3 V supply is described. The design has been fabricated in the HP 1.2 /spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using MDAC's with 6-bit resolution.