C. Diorio, T. Humes, H. Notthoff, G. Chao, A. Lai, J. Hyde, M. Kintis, A. Oki
{"title":"A 5.5 GHz fractional frequency-synthesizer IC","authors":"C. Diorio, T. Humes, H. Notthoff, G. Chao, A. Lai, J. Hyde, M. Kintis, A. Oki","doi":"10.1109/GAAS.1997.628280","DOIUrl":null,"url":null,"abstract":"We report a GaAs-AlGaAs fractional frequency-synthesizer IC with a 5.5 GHz feedback divider, 2 GHz reference divider, 500 MHz phase-frequency detector, 1 ns charge-pump pulses, gain-normalized output current, and 18 pA/sub rms///spl radic/Hz in-band phase noise. The feedback divider allows continuously selectable divide ratios from 12 to 16383, and supports dual-modulus pulse-swallowing fractional synthesis with single-bit control. The reference divider allows continuously selectable divide ratios from 1 to 4095; an optional divide-by-four/five input prescaler extends the divide ratios to 20475. The chip consumes 1 W from +5 V and -5.2 V supplies.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"80 3-4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1997.628280","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We report a GaAs-AlGaAs fractional frequency-synthesizer IC with a 5.5 GHz feedback divider, 2 GHz reference divider, 500 MHz phase-frequency detector, 1 ns charge-pump pulses, gain-normalized output current, and 18 pA/sub rms///spl radic/Hz in-band phase noise. The feedback divider allows continuously selectable divide ratios from 12 to 16383, and supports dual-modulus pulse-swallowing fractional synthesis with single-bit control. The reference divider allows continuously selectable divide ratios from 1 to 4095; an optional divide-by-four/five input prescaler extends the divide ratios to 20475. The chip consumes 1 W from +5 V and -5.2 V supplies.