D. Lenoble, F. Arnaud, A. Grouillet, R. Liebert, S. Walther, S. Felch, Z. Fangi, M. Haond
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引用次数: 6
Abstract
For the first time, we include low biased plasma doping (LB PLAD) technique for extensions doping within an industrial 0.13 /spl mu/m CMOS process. By comparing to the Ultra-Low Energy Ion Implantation (B/sup +/ and BF/sub 2//sup +/) technique (ULE I/I), plasma doped devices exhibits improved Short Channel Effect (SCE) and subthreshold performances mostly attributed to the good junction characteristics (tradeoff junction depth (X/sub j/)/sheet resistance (R/sub s/)).