{"title":"Evaluation of quasi-resonant dc-link technique on generalized three-level inverter","authors":"I. Lok, M. Wong","doi":"10.1109/APCCAS.2008.4746200","DOIUrl":null,"url":null,"abstract":"This paper presents a combination of a quasiresonant dc-link (QRDCL) inverter and a generalized three-level inverter. QRDCL inverter can decrease the dc-link voltage to zero in order to provide a zero voltage condition for the power devices. The voltage stresses of the power devices can be released and the switching losses of the inverter can be reduced under zero-voltage switching (ZVS). Generalized multilevel inverter topology provides an alternative way in high level inverter implementation. The generalized multilevel inverter is constructed by several basic cells which enable a higher flexibility in extending the levels of inverter, and moreover it gives the inverter a self voltage balancing ability without any assistance from extra circuits. Control strategy of a generalized three-level QRDCL inverter is proposed. Switching losses of the inverters are also presented to prove the feasibility of a generalized three-level QRDCL inverter.","PeriodicalId":344917,"journal":{"name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","volume":"142 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2008.4746200","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a combination of a quasiresonant dc-link (QRDCL) inverter and a generalized three-level inverter. QRDCL inverter can decrease the dc-link voltage to zero in order to provide a zero voltage condition for the power devices. The voltage stresses of the power devices can be released and the switching losses of the inverter can be reduced under zero-voltage switching (ZVS). Generalized multilevel inverter topology provides an alternative way in high level inverter implementation. The generalized multilevel inverter is constructed by several basic cells which enable a higher flexibility in extending the levels of inverter, and moreover it gives the inverter a self voltage balancing ability without any assistance from extra circuits. Control strategy of a generalized three-level QRDCL inverter is proposed. Switching losses of the inverters are also presented to prove the feasibility of a generalized three-level QRDCL inverter.