Study of bitcell qualification using current and voltage based metric’s in 7nm FinFet Technology

Abstract

This paper presents the study of impact from the conventional voltage based metric in designing SRAM in 7nm and advanced FinFet technology. Voltage based metric doesn’t provide the detail of charges that can be injected into the SRAM bitcell node before the bitcell node starts to flip, whereas current based (N-curve) approach gives a better insight which leads to designing of stable and robust SRAM bitcell. The study includes analyzing of bitcell metrics such as read stability and write ability to compare the voltage and current based approach.