{"title":"A pulse Doppler radar using reconfigurable computing","authors":"S. Sumeen, M. Mobien, M.I. Siddiqi","doi":"10.1109/INMIC.2003.1416701","DOIUrl":null,"url":null,"abstract":"In a variety of signal processing applications, nowadays, the use of radar for advanced control has become a necessity, e.g., navigational systems, aircraft, automobiles and other sensing devices. A normal microprocessor based radar signal processor eats a lot of processing power and time so we have proposed the implementation of a dynamically reconfigurable pulsed Doppler radar in a mixed system comprising a digital signal processor (DSP) and FPGA to perform linear frequency modulation, Gaussian noise filtering, downconversion, pulse compression (matched filtering) and pulsed Doppler processing. Allowing the users to modify range and delay, the reconfigurable processor on-chip helps DSP(s) exploit more of the parallelism found in digital signal processing applications, thus improving the processor's overall performance.","PeriodicalId":253329,"journal":{"name":"7th International Multi Topic Conference, 2003. INMIC 2003.","volume":"274 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Multi Topic Conference, 2003. INMIC 2003.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INMIC.2003.1416701","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In a variety of signal processing applications, nowadays, the use of radar for advanced control has become a necessity, e.g., navigational systems, aircraft, automobiles and other sensing devices. A normal microprocessor based radar signal processor eats a lot of processing power and time so we have proposed the implementation of a dynamically reconfigurable pulsed Doppler radar in a mixed system comprising a digital signal processor (DSP) and FPGA to perform linear frequency modulation, Gaussian noise filtering, downconversion, pulse compression (matched filtering) and pulsed Doppler processing. Allowing the users to modify range and delay, the reconfigurable processor on-chip helps DSP(s) exploit more of the parallelism found in digital signal processing applications, thus improving the processor's overall performance.