FPGA Implementation of Multi-RT Protocol for Avionics Simulation

Narasimhulu Pillutla, Shishir Kumar
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Abstract

MIL-STD-1553B bus is widely used as a primary bus in many avionics, satellite and military applications. As the number of subsystems increasing on the 1553B bus, increases complexities in the communications due to interdependency. Operational testing of these systems during system integration is a challenging task and requires data from multiple systems. Thus, the availability and readiness of subsystems are essential. In the absence of subsystems, 1553B based Remote Terminal (RT) simulator hardware can act as a real-time system to replicate the functionality of the individual subsystem. Hardware and development cost of the system goes high with the number of RTs to simulate in current scenario. The proposed solution describes the design of simulating 32 RTs using a single 1553B node and introduces a four node 1553B card based on ARTIX FPGA, which simulates 4x32 RTs. It is compact, low-cost and low power solution for providing real-time 1553B RT communication, which meets requirements of an avionics application to large extent.
航电仿真多rt协议的FPGA实现
MIL-STD-1553B总线被广泛用作许多航空电子设备、卫星和军事应用的主总线。随着1553B总线上子系统数量的增加,由于相互依赖,通信的复杂性也随之增加。在系统集成期间对这些系统进行操作测试是一项具有挑战性的任务,需要来自多个系统的数据。因此,子系统的可用性和准备是必不可少的。在没有子系统的情况下,基于1553B的远程终端(RT)模拟器硬件可以作为一个实时系统来复制单个子系统的功能。在当前场景下,随着需要模拟的RTs数量的增加,系统的硬件和开发成本也越来越高。该方案描述了使用单个1553B节点模拟32个RTs的设计,并介绍了一种基于ARTIX FPGA的四节点1553B卡,用于模拟4x32 RTs。它是一种紧凑、低成本、低功耗的解决方案,可提供实时1553B RT通信,在很大程度上满足航空电子应用的要求。
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