{"title":"An integrated MOS transistor associative memory system with 100 ns cycle time","authors":"R. Igarashi, T. Yaita","doi":"10.1145/1465482.1465565","DOIUrl":null,"url":null,"abstract":"Since the announcement of the development of a technique for using MOS transistor integrated circuits as associative memory cells, 128 words of 48 bits per word associative memory has been experimented and engineered.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"AFIPS '67 (Spring)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1465482.1465565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Since the announcement of the development of a technique for using MOS transistor integrated circuits as associative memory cells, 128 words of 48 bits per word associative memory has been experimented and engineered.