HML: an innovative hardware description language and its translation to VHDL

Abstract

HML (Hardware ML) is an innovative hardware description language based on the functional programming language SML. HML is a high-order language with polymorphic types. It uses advanced type checking and type inference techniques. We have implemented an HML type checker and a translator to VHDL. We generate a synthesizable subset of VHDL and automatically infer types and interfaces. This paper gives an overview of HML and discusses its typechecking techniques and the translation from HML to VHDL. We present a non-restoring integer square-root example to illustrate the HML system.