I.S. Park, B. Lee, S. Choi, Jae Soon Im, Seung Hwan Lee, K. Park, Joo-Won Lee, Y. Hyung, Yeong-kwan Kim, H. Park, Y. Park, Sang In Lee, M. Lee
{"title":"Novel MIS Al/sub 2/O/sub 3/ capacitor as a prospective technology for Gbit DRAMs","authors":"I.S. Park, B. Lee, S. Choi, Jae Soon Im, Seung Hwan Lee, K. Park, Joo-Won Lee, Y. Hyung, Yeong-kwan Kim, H. Park, Y. Park, Sang In Lee, M. Lee","doi":"10.1109/VLSIT.2000.852761","DOIUrl":null,"url":null,"abstract":"A novel MIS-Al/sub 2/O/sub 3/ capacitor technology was developed with the low thermal budget and showed the superior dielectric characteristics, which were achieved by adopting ALD technique for the Al/sub 2/O/sub 3/ film deposition. A fully integrated 1 Gbit DRAM with MIS-Al/sub 2/O/sub 3/ capacitor was successfully worked, where storage capacitance and leakage current at 1.2 V were 30 fF/cell and 0.5 fA/cell, respectively. Moreover, the excellent dielectric characteristics were confirmed from the result that Vp for generating solid \"0\" 10 sec fail bit counts was measured to be 2.4 V.","PeriodicalId":268624,"journal":{"name":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","volume":"160 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2000.852761","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A novel MIS-Al/sub 2/O/sub 3/ capacitor technology was developed with the low thermal budget and showed the superior dielectric characteristics, which were achieved by adopting ALD technique for the Al/sub 2/O/sub 3/ film deposition. A fully integrated 1 Gbit DRAM with MIS-Al/sub 2/O/sub 3/ capacitor was successfully worked, where storage capacitance and leakage current at 1.2 V were 30 fF/cell and 0.5 fA/cell, respectively. Moreover, the excellent dielectric characteristics were confirmed from the result that Vp for generating solid "0" 10 sec fail bit counts was measured to be 2.4 V.